APIO makes open-source FPGA development on the Tang Nano 20K trivial. It aggregates Yosys, GTKWave, and other tools into a single workflow, available as a Visual Studio Code extension or command-line install. One config file, three lines: board, top module, done. GOWIN's proprietary toolchain is functional, but its bundled simulator is now effectively inaccessible following an acquisition.
The install is not frictionless. A conflicting libreadline.so.8 inside ~/.apio/bin/_internal will silently break everything. Rename or delete it. APIO also runs its own private copies of every tool, meaning your system GTKWave and APIO's GTKWave will collide if you try to use them interchangeably outside the extension. The article walks through exactly where these conflicts surface and how to route around them.
The tradeoff is real. APIO wins on simulation and linting, with a capable Verilog linter and clean GTKWave integration. GOWIN wins on IP blocks: proprietary clock generators, memory controllers, and soft CPUs that APIO cannot touch. The next installment covers the Verilog internals of the LED blink example used here. If you are choosing a toolchain for the Tang Nano 20K right now, the specifics of that tradeoff are worth reading in full.
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